Display Timing & Configuration Generator

RGB · LVDS · MIPI-DSI　Generate timing, link budgets, and platform configurations for RTOS, Linux, and Android

Input Parameters

px
px
FPS

Video Timing

Video Timing Diagram

HSYNC 48HBP 40HAdr 800HFP 40 HSyncHBPHActiveHFP VSYNC 3VBP 29VAdr 480VFP 13 Active Display AreaDiagram is not drawn to numeric scale
H/V Active is the visible area. Front Porch, Sync Width, and Back Porch form the non-active interval and determine the total period and pixel clock.
Pixel Clock—MHz
Active Pixel Bandwidth—MB/s
Total Period—pixel/frame
Frame Buffer Size—MiB

Calculation Results

Active Display DataNon-Display Timing Share
Parameters are within the recommended range
ResultValueFormula

Platform Configuration Snippet

Generated values are intended for design and initial bring-up. Validate them against the panel datasheet, electrical timing, and measurements before production.